1. Field of the Invention
Example embodiments relate to a semiconductor device and a method of manufacturing the same and, more particularly, to a semiconductor device including well regions and a method of manufacturing the same.
2. Description of the Related Art
A non-volatile memory device includes a high voltage transistor for controlling a high voltage used in program and erase operations. For example, the high voltage transistor may be included in a page buffer, a high voltage switch, a block select switch, etc. Well regions are further included in the substrate of the non-volatile memory device so that the high voltage transistor has a high breakdown voltage.
A known non-volatile memory device includes well regions formed within a P type substrate. The well regions may have a triple well structure including a P type well and an N type well formed to surround the P type well, or may have a double well structure including a P type well and an N type well formed under the P type well.
In the double well structure, the P type well is formed to have the same width as the N type well without surrounding the N type well. Thus, the well regions of the double well structure have a relatively low impurity concentration as compared with the triple well structure. Accordingly, the depletion layers of the source/drain regions of a high voltage transistor and the depletion layers of the well regions may be merged with each other and then extended because they are close to each other. It results in a problem wherein the breakdown voltage of the high voltage transistor is lowered. If the breakdown voltage of the high voltage transistor is lowered, the characteristic of the memory device deteriorates because program and erase biases may not be normally controlled.